6 files changed, 20 insertions, 2 deletions
diff --git a/src/video_core/dma_pusher.cpp b/src/video_core/dma_pusher.cpp
index 31627b812..324dafdcd 100644
--- a/src/video_core/dma_pusher.cpp
+++ b/src/video_core/dma_pusher.cpp
@@ -34,6 +34,7 @@ void DmaPusher::DispatchCalls() {
     }
     gpu.FlushCommands();
     gpu.SyncGuestHost();
+    gpu.OnCommandListEnd();
 }
 
 bool DmaPusher::Step() {
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 2298a6273..2605c3b42 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -397,6 +397,14 @@ void Maxwell3D::StampQueryResult(u64 payload, bool long_query) {
     }
 }
 
+void Maxwell3D::ReleaseFences() {
+    for (const auto pair : delay_fences) {
+        const auto [addr, payload] = pair;
+        memory_manager.Write<u32>(addr, static_cast<u32>(payload));
+    }
+    delay_fences.clear();
+}
+
 void Maxwell3D::ProcessQueryGet() {
     // TODO(Subv): Support the other query units.
     ASSERT_MSG(regs.query.query_get.unit == Regs::QueryUnit::Crop,
@@ -407,7 +415,7 @@ void Maxwell3D::ProcessQueryGet() {
         rasterizer.FlushCommands();
         rasterizer.SyncGuestHost();
         const u64 result = regs.query.query_sequence;
-        StampQueryResult(result, regs.query.query_get.short_query == 0);
+        delay_fences.emplace_back(regs.query.QueryAddress(), result);
         break;
     }
     case Regs::QueryOperation::Acquire:
diff --git a/src/video_core/engines/maxwell_3d.h b/src/video_core/engines/maxwell_3d.h
index 59d5752d2..0a93827ec 100644
--- a/src/video_core/engines/maxwell_3d.h
+++ b/src/video_core/engines/maxwell_3d.h
@@ -1427,6 +1427,8 @@ public:
         Tables tables{};
     } dirty;
 
+    void ReleaseFences();
+
 private:
     void InitializeRegisterDefaults();
 
@@ -1467,6 +1469,8 @@ private:
 
     std::array<u8, Regs::NUM_REGS> dirty_pointers{};
 
+    std::vector<std::pair<GPUVAddr, u64>> delay_fences;
+
     /// Retrieves information about a specific TIC entry from the TIC buffer.
     Texture::TICEntry GetTICEntry(u32 tic_index) const;
 
diff --git a/src/video_core/gpu.cpp b/src/video_core/gpu.cpp
index 13bca5a78..71ddfbd26 100644
--- a/src/video_core/gpu.cpp
+++ b/src/video_core/gpu.cpp
@@ -145,6 +145,10 @@ void GPU::FlushCommands() {
 void GPU::SyncGuestHost() {
     renderer->Rasterizer().SyncGuestHost();
 }
+
+void GPU::OnCommandListEnd() {
+    maxwell_3d->ReleaseFences();
+}
 // Note that, traditionally, methods are treated as 4-byte addressable locations, and hence
 // their numbers are written down multiplied by 4 in Docs. Here we are not multiply by 4.
 // So the values you see in docs might be multiplied by 4.
diff --git a/src/video_core/gpu.h b/src/video_core/gpu.h
index 99ed190bc..b88445634 100644
--- a/src/video_core/gpu.h
+++ b/src/video_core/gpu.h
@@ -157,6 +157,7 @@ public:
 
     void FlushCommands();
     void SyncGuestHost();
+    void OnCommandListEnd();
 
     /// Returns a reference to the Maxwell3D GPU engine.
     Engines::Maxwell3D& Maxwell3D();
diff --git a/src/video_core/gpu_thread.cpp b/src/video_core/gpu_thread.cpp
index 0a8123cfe..1994d3bb4 100644
--- a/src/video_core/gpu_thread.cpp
+++ b/src/video_core/gpu_thread.cpp
@@ -78,7 +78,7 @@ void ThreadManager::SwapBuffers(const Tegra::FramebufferConfig* framebuffer) {
 }
 
 void ThreadManager::FlushRegion(VAddr addr, u64 size) {
-    system.Renderer().Rasterizer().FlushRegion(addr, size);
+    PushCommand(FlushRegionCommand(addr, size));
 }
 
 void ThreadManager::InvalidateRegion(VAddr addr, u64 size) {