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author | Lioncash <mathew1800@gmail.com> | 2015-04-06 18:43:23 +0200 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-04-06 18:48:35 +0200 |
commit | b7b8b676202eaeced392dea06e2c3fcc4bd11aec (patch) | |
tree | b104bd34e6fd7eb109fc7591f383623e877078ad /src/core/arm/dyncom | |
parent | dyncom: Properly return the value of the user RO thread register (diff) | |
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Diffstat (limited to 'src/core/arm/dyncom')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index b0efd7194..b8fbe7f3a 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3700,7 +3700,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) { #define OPCODE_1 inst_cream->opcode_1 #define OPCODE_2 inst_cream->opcode_2 #define CRm inst_cream->crm - #define CP15_REG(n) cpu->CP15[CP15(n)] #define RD cpu->Reg[inst_cream->Rd] #define RD2 cpu->Reg[inst_cream->Rd + 1] #define RN cpu->Reg[inst_cream->Rn] |