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| author | Tony Wasserka <NeoBrainX@gmail.com> | 2014-06-01 00:22:40 +0200 |
|---|---|---|
| committer | Tony Wasserka <NeoBrainX@gmail.com> | 2014-07-23 00:33:08 +0200 |
| commit | ec9511e1db1f7ff0c2a8f86916937ea5736cdcf6 (patch) | |
| tree | 80ee4beb7fc5a569a40b3e8644a5c51f006b5938 /src/core/hle | |
| parent | GSP: Implement ReadHWRegs and WriteHWRegs properly. (diff) | |
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Diffstat (limited to 'src/core/hle')
| -rw-r--r-- | src/core/hle/service/gsp.cpp | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/core/hle/service/gsp.cpp b/src/core/hle/service/gsp.cpp index cc111b0bb..fea521891 100644 --- a/src/core/hle/service/gsp.cpp +++ b/src/core/hle/service/gsp.cpp @@ -176,10 +176,17 @@ void TriggerCmdReqQueue(Service::Interface* self) { case GXCommandId::SET_MEMORY_FILL: break; + // TODO: Check if texture copies are implemented correctly.. case GXCommandId::SET_DISPLAY_TRANSFER: - break; - case GXCommandId::SET_TEXTURE_COPY: + GPU::Write<u32>(GPU::Registers::DisplayInputBufferAddr, cmd_buff[1] >> 3); + GPU::Write<u32>(GPU::Registers::DisplayOutputBufferAddr, cmd_buff[2] >> 3); + GPU::Write<u32>(GPU::Registers::DisplayInputBufferSize, cmd_buff[3]); + GPU::Write<u32>(GPU::Registers::DisplayOutputBufferSize, cmd_buff[4]); + GPU::Write<u32>(GPU::Registers::DisplayTransferFlags, cmd_buff[5]); + + // TODO: GPU::Registers::DisplayTriggerTransfer should be ORed with 1 for texture copies? + GPU::Write<u32>(GPU::Registers::DisplayTriggerTransfer, 1); break; case GXCommandId::SET_COMMAND_LIST_FIRST: |