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authorSubv <subv2112@gmail.com>2018-06-07 06:54:25 +0200
committerSubv <subv2112@gmail.com>2018-07-03 23:56:44 +0200
commitbe51120d237cb551fae90fbfaebda41669c40403 (patch)
tree37e4ec442f159f6c63ee6db560e4ff23df44bad1 /src/video_core/engines/maxwell_3d.cpp
parentGPU: Added registers for the CLEAR_BUFFERS and CLEAR_COLOR methods. (diff)
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Diffstat (limited to 'src/video_core/engines/maxwell_3d.cpp')
-rw-r--r--src/video_core/engines/maxwell_3d.cpp11
1 files changed, 11 insertions, 0 deletions
diff --git a/src/video_core/engines/maxwell_3d.cpp b/src/video_core/engines/maxwell_3d.cpp
index 93c43c8cb..78f1c0ea7 100644
--- a/src/video_core/engines/maxwell_3d.cpp
+++ b/src/video_core/engines/maxwell_3d.cpp
@@ -126,6 +126,10 @@ void Maxwell3D::WriteReg(u32 method, u32 value, u32 remaining_params) {
DrawArrays();
break;
}
+ case MAXWELL3D_REG_INDEX(clear_buffers): {
+ ProcessClearBuffers();
+ break;
+ }
case MAXWELL3D_REG_INDEX(query.query_get): {
ProcessQueryGet();
break;
@@ -415,5 +419,12 @@ bool Maxwell3D::IsShaderStageEnabled(Regs::ShaderStage stage) const {
UNREACHABLE();
}
+void Maxwell3D::ProcessClearBuffers() {
+ ASSERT(regs.clear_buffers.R && regs.clear_buffers.G && regs.clear_buffers.B &&
+ regs.clear_buffers.A);
+
+ VideoCore::g_renderer->Rasterizer()->Clear();
+}
+
} // namespace Engines
} // namespace Tegra