diff options
| author | bunnei <bunneidev@gmail.com> | 2020-06-27 05:14:56 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-06-27 05:14:56 +0200 |
| commit | efef7b151734207b4cc9487147d9bed4328c13cc (patch) | |
| tree | 08c28074ff08227f05a43b7914805e600c824243 /src/video_core/engines | |
| parent | Merge pull request #4178 from VolcaEM/patch-6 (diff) | |
| parent | shader/half_set: Implement HSET2_IMM (diff) | |
| download | yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar.gz yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar.bz2 yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar.lz yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar.xz yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.tar.zst yuzu-efef7b151734207b4cc9487147d9bed4328c13cc.zip | |
Diffstat (limited to 'src/video_core/engines')
| -rw-r--r-- | src/video_core/engines/shader_bytecode.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index e7cb87589..d374b73cf 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -661,6 +661,10 @@ union Instruction { constexpr Instruction(u64 value) : value{value} {} constexpr Instruction(const Instruction& instr) : value(instr.value) {} + constexpr bool Bit(u64 offset) const { + return ((value >> offset) & 1) != 0; + } + BitField<0, 8, Register> gpr0; BitField<8, 8, Register> gpr8; union { @@ -1874,7 +1878,9 @@ public: HSETP2_C, HSETP2_R, HSETP2_IMM, + HSET2_C, HSET2_R, + HSET2_IMM, POPC_C, POPC_R, POPC_IMM, @@ -2194,7 +2200,9 @@ private: INST("0111111-1-------", Id::HSETP2_C, Type::HalfSetPredicate, "HSETP2_C"), INST("0101110100100---", Id::HSETP2_R, Type::HalfSetPredicate, "HSETP2_R"), INST("0111111-0-------", Id::HSETP2_IMM, Type::HalfSetPredicate, "HSETP2_IMM"), + INST("0111110-1-------", Id::HSET2_C, Type::HalfSet, "HSET2_C"), INST("0101110100011---", Id::HSET2_R, Type::HalfSet, "HSET2_R"), + INST("0111110-0-------", Id::HSET2_IMM, Type::HalfSet, "HSET2_IMM"), INST("010110111010----", Id::FCMP_RR, Type::Arithmetic, "FCMP_RR"), INST("010010111010----", Id::FCMP_RC, Type::Arithmetic, "FCMP_RC"), INST("0101000010000---", Id::MUFU, Type::Arithmetic, "MUFU"), |