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author | ReinUsesLisp <reinuseslisp@airmail.cc> | 2018-12-17 22:09:40 +0100 |
---|---|---|
committer | ReinUsesLisp <reinuseslisp@airmail.cc> | 2019-01-15 21:54:51 +0100 |
commit | b0e79208385ca3183fd1abdd4c6628268840e9ef (patch) | |
tree | b7bc86e90a0c5fd356c8e435f7911c0fc228e242 /src/video_core/shader/decode/xmad.cpp | |
parent | shader_decode: Implement PBK and BRK (diff) | |
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Diffstat (limited to 'src/video_core/shader/decode/xmad.cpp')
-rw-r--r-- | src/video_core/shader/decode/xmad.cpp | 86 |
1 files changed, 85 insertions, 1 deletions
diff --git a/src/video_core/shader/decode/xmad.cpp b/src/video_core/shader/decode/xmad.cpp index 27a2fc05d..fcab1fb80 100644 --- a/src/video_core/shader/decode/xmad.cpp +++ b/src/video_core/shader/decode/xmad.cpp @@ -16,7 +16,91 @@ u32 ShaderIR::DecodeXmad(BasicBlock& bb, u32 pc) { const Instruction instr = {program_code[pc]}; const auto opcode = OpCode::Decode(instr); - UNIMPLEMENTED(); + UNIMPLEMENTED_IF(instr.xmad.sign_a); + UNIMPLEMENTED_IF(instr.xmad.sign_b); + UNIMPLEMENTED_IF_MSG(instr.generates_cc, + "Condition codes generation in XMAD is not implemented"); + + Node op_a = GetRegister(instr.gpr8); // instr.xmad.sign_a + + // TODO(bunnei): Needs to be fixed once op_a or op_b is signed + UNIMPLEMENTED_IF(instr.xmad.sign_a != instr.xmad.sign_b); + const bool is_signed_a = instr.xmad.sign_a == 1; + const bool is_signed_b = instr.xmad.sign_b == 1; + const bool is_signed_c = is_signed_a; + + auto [is_merge, op_b, op_c] = [&]() -> std::tuple<bool, Node, Node> { + switch (opcode->get().GetId()) { + case OpCode::Id::XMAD_CR: + return {instr.xmad.merge_56, GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset), + GetRegister(instr.gpr39)}; + case OpCode::Id::XMAD_RR: + return {instr.xmad.merge_37, GetRegister(instr.gpr20), GetRegister(instr.gpr39)}; + case OpCode::Id::XMAD_RC: + return {false, GetRegister(instr.gpr39), + GetConstBuffer(instr.cbuf34.index, instr.cbuf34.offset)}; + case OpCode::Id::XMAD_IMM: + return {instr.xmad.merge_37, Immediate(static_cast<u32>(instr.xmad.imm20_16)), + GetRegister(instr.gpr39)}; + default: + UNIMPLEMENTED_MSG("Unhandled XMAD instruction: {}", opcode->get().GetName()); + } + }(); + + if (instr.xmad.high_a) { + op_a = SignedOperation(OperationCode::ILogicalShiftRight, is_signed_a, NO_PRECISE, op_a, + Immediate(16)); + } else { + op_a = SignedOperation(OperationCode::IBitwiseAnd, is_signed_a, NO_PRECISE, op_a, + Immediate(0xffff)); + } + + const Node original_b = op_b; + if (instr.xmad.high_b) { + op_b = SignedOperation(OperationCode::ILogicalShiftRight, is_signed_b, NO_PRECISE, op_a, + Immediate(16)); + } else { + op_b = SignedOperation(OperationCode::IBitwiseAnd, is_signed_b, NO_PRECISE, op_b, + Immediate(0xffff)); + } + + // TODO(Rodrigo): Use an appropiate sign for this operation + Node product = Operation(OperationCode::IMul, NO_PRECISE, op_a, op_b); + if (instr.xmad.product_shift_left) { + product = Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, op_a, Immediate(16)); + } + + op_c = [&]() { + switch (instr.xmad.mode) { + case Tegra::Shader::XmadMode::None: + return op_c; + case Tegra::Shader::XmadMode::CLo: + return SignedOperation(OperationCode::IBitwiseAnd, is_signed_c, NO_PRECISE, op_c, + Immediate(0xffff)); + case Tegra::Shader::XmadMode::CHi: + return SignedOperation(OperationCode::ILogicalShiftRight, is_signed_c, NO_PRECISE, op_c, + Immediate(16)); + case Tegra::Shader::XmadMode::CBcc: { + const Node shifted_b = SignedOperation(OperationCode::ILogicalShiftLeft, is_signed_b, + NO_PRECISE, original_b, Immediate(16)); + return SignedOperation(OperationCode::IAdd, is_signed_c, NO_PRECISE, op_c, shifted_b); + } + default: { + UNIMPLEMENTED_MSG("Unhandled XMAD mode: {}", static_cast<u32>(instr.xmad.mode.Value())); + } + } + }(); + + // TODO(Rodrigo): Use an appropiate sign for this operation + Node sum = Operation(OperationCode::IAdd, product, op_c); + if (is_merge) { + const Node a = Operation(OperationCode::IBitwiseAnd, NO_PRECISE, sum, Immediate(0xffff)); + const Node b = + Operation(OperationCode::ILogicalShiftLeft, NO_PRECISE, original_b, Immediate(0xffff)); + sum = Operation(OperationCode::IBitwiseOr, NO_PRECISE, a, b); + } + + SetRegister(bb, instr.gpr0, sum); return pc; } |