diff options
author | bunnei <bunneidev@gmail.com> | 2018-07-01 17:06:04 +0200 |
---|---|---|
committer | GitHub <noreply@github.com> | 2018-07-01 17:06:04 +0200 |
commit | 066d6184d453fdcf6e9a4622646a514e0cbccc53 (patch) | |
tree | 22d1d5a2f191416276b159b28bc1441946cba62d /src/video_core | |
parent | Merge pull request #601 from Subv/rgba32_ui (diff) | |
parent | GPU: Corrected the size of the MUFU subop field, and removed incorrect "min" operation. (diff) | |
download | yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar.gz yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar.bz2 yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar.lz yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar.xz yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.tar.zst yuzu-066d6184d453fdcf6e9a4622646a514e0cbccc53.zip |
Diffstat (limited to 'src/video_core')
-rw-r--r-- | src/video_core/engines/shader_bytecode.h | 3 | ||||
-rw-r--r-- | src/video_core/renderer_opengl/gl_shader_decompiler.cpp | 4 |
2 files changed, 1 insertions, 6 deletions
diff --git a/src/video_core/engines/shader_bytecode.h b/src/video_core/engines/shader_bytecode.h index 0527fc376..86fd64979 100644 --- a/src/video_core/engines/shader_bytecode.h +++ b/src/video_core/engines/shader_bytecode.h @@ -166,7 +166,6 @@ enum class SubOp : u64 { Lg2 = 0x3, Rcp = 0x4, Rsq = 0x5, - Min = 0x8, }; enum class F2iRoundingOp : u64 { @@ -210,7 +209,7 @@ union Instruction { } pred; BitField<19, 1, u64> negate_pred; BitField<20, 8, Register> gpr20; - BitField<20, 7, SubOp> sub_op; + BitField<20, 4, SubOp> sub_op; BitField<28, 8, Register> gpr28; BitField<39, 8, Register> gpr39; BitField<48, 16, u64> opcode; diff --git a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp index 3ef79a5e7..bbccf0bfd 100644 --- a/src/video_core/renderer_opengl/gl_shader_decompiler.cpp +++ b/src/video_core/renderer_opengl/gl_shader_decompiler.cpp @@ -917,10 +917,6 @@ private: regs.SetRegisterToFloat(instr.gpr0, 0, "inversesqrt(" + op_a + ')', 1, 1, instr.alu.saturate_d); break; - case SubOp::Min: - regs.SetRegisterToFloat(instr.gpr0, 0, "min(" + op_a + "," + op_b + ')', 1, 1, - instr.alu.saturate_d); - break; default: NGLOG_CRITICAL(HW_GPU, "Unhandled MUFU sub op: {0:x}", static_cast<unsigned>(instr.sub_op.Value())); |