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author | Lioncash <mathew1800@gmail.com> | 2015-05-23 05:42:23 +0200 |
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committer | Lioncash <mathew1800@gmail.com> | 2015-05-23 05:42:23 +0200 |
commit | 92fd2753c54e23815eead954dfec091a6b156840 (patch) | |
tree | 859c3f64d65b797cb892de5d8100528774a3a653 /src | |
parent | dyncom: remove load_r15 from arm_inst (diff) | |
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Diffstat (limited to 'src')
-rw-r--r-- | src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 2d93f2b03..e4b5486e0 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -3490,7 +3490,7 @@ enum { FETCH_FAILURE }; -static tdstate decode_thumb_instr(ARMul_State* cpu, u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) { +static tdstate decode_thumb_instr(u32 inst, u32 addr, u32* arm_inst, u32* inst_size, ARM_INST_PTR* ptr_inst_base) { // Check if in Thumb mode tdstate ret = thumb_translate (addr, inst, arm_inst, inst_size); if(ret == t_branch){ @@ -3581,8 +3581,7 @@ static int InterpreterTranslate(ARMul_State* cpu, int& bb_start, u32 addr) { // If we are in thumb instruction, we will translate one thumb to one corresponding arm instruction if (cpu->TFlag) { uint32_t arm_inst; - tdstate state; - state = decode_thumb_instr(cpu, inst, phys_addr, &arm_inst, &inst_size, &inst_base); + tdstate state = decode_thumb_instr(inst, phys_addr, &arm_inst, &inst_size, &inst_base); // We have translated the branch instruction of thumb in thumb decoder if(state == t_branch){ |